The present disclosure generally relates to improving memory distribution across multiple processing nodes that have non-uniform memory access. Non-uniform memory access nodes (“NUMA nodes”) typically include multiple processors or processing units and a local memory including several memory banks, which are located near the multiple processors in the NUMA node. Thus, each processor typically has some memory located nearby, which provides a low memory access latency, or a fast memory access response, and some memory is further away, which provides a higher memory access latency, or a slower memory access response. Generally, it is beneficial to appropriately distribute and/or re-distribute memory for processes across NUMA nodes to optimize processing performance. For example, it is typically ideal to run a process on a processing unit (e.g., a CPU core) that is near the process's memory bank, or alternatively, to move the process's memory to a memory bank near the processing unit where the process is running. Thus, the process may access the nearby memory bank with low memory access latency, thereby increasing processing speed. However, when a process is handled in a distributed manner across multiple NUMA nodes, it can be difficult to determine an optimal memory distribution.